<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
<meta name="generator" content="Doxygen 1.8.14"/>
<meta name="viewport" content="width=device-width, initial-scale=1"/>
<title>gpiops: xgpiops.h File Reference</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="dynsections.js"></script>
<link href="navtree.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="resize.js"></script>
<script type="text/javascript" src="navtreedata.js"></script>
<script type="text/javascript" src="navtree.js"></script>
<script type="text/javascript">
  $(document).ready(initResizable);
</script>
<link href="doxygen.css" rel="stylesheet" type="text/css" />
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
</head>
<body>
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
<div id="titlearea">
<table cellspacing="0" cellpadding="0">
 <tbody>
 <tr style="height: 56px;">
  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.gif"/></td>
  <td id="projectalign" style="padding-left: 0.5em;">
   <div id="projectname">gpiops
   </div>
   <div id="projectbrief">Xilinx SDK Drivers API Documentation</div>
  </td>
 </tr>
 </tbody>
</table>
</div>
<!-- end header part -->
<!-- Generated by Doxygen 1.8.14 -->
<script type="text/javascript" src="menudata.js"></script>
<script type="text/javascript" src="menu.js"></script>
<script type="text/javascript">
$(function() {
  initMenu('',false,false,'search.php','Search');
});
</script>
<div id="main-nav"></div>
</div><!-- top -->
<div id="side-nav" class="ui-resizable side-nav-resizable">
  <div id="nav-tree">
    <div id="nav-tree-contents">
      <div id="nav-sync" class="sync"></div>
    </div>
  </div>
  <div id="splitbar" style="-moz-user-select:none;" 
       class="ui-resizable-handle">
  </div>
</div>
<script type="text/javascript">
$(document).ready(function(){initNavTree('xgpiops_8h.html','');});
</script>
<div id="doc-content">
<div class="header">
  <div class="summary">
<a href="#nested-classes">Data Structures</a> &#124;
<a href="#define-members">Macros</a> &#124;
<a href="#typedef-members">Typedefs</a> &#124;
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle">
<div class="title">xgpiops.h File Reference</div>  </div>
</div><!--header-->
<div class="contents">
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_gpio_ps___config.html">XGpioPs_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for a device.  <a href="struct_x_gpio_ps___config.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_gpio_ps.html">XGpioPs</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_gpio_ps.html" title="The XGpioPs driver instance data. ">XGpioPs</a> driver instance data.  <a href="struct_x_gpio_ps.html#details">More...</a><br /></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga1e440e05bbea534ebf6939e88eb1455f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga1e440e05bbea534ebf6939e88eb1455f">XGPIOPS_BANK_MAX_PINS</a>&#160;&#160;&#160;(u32)32</td></tr>
<tr class="memdesc:ga1e440e05bbea534ebf6939e88eb1455f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max pins in a GPIO bank.  <a href="group__gpiops__v3__1.html#ga1e440e05bbea534ebf6939e88eb1455f">More...</a><br /></td></tr>
<tr class="separator:ga1e440e05bbea534ebf6939e88eb1455f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac5c6fe277747f034cd30c3f3e770dc5b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#gac5c6fe277747f034cd30c3f3e770dc5b">XGPIOPS_BANK0</a>&#160;&#160;&#160;0x00U</td></tr>
<tr class="memdesc:gac5c6fe277747f034cd30c3f3e770dc5b"><td class="mdescLeft">&#160;</td><td class="mdescRight">GPIO Bank 0.  <a href="group__gpiops__v3__1.html#gac5c6fe277747f034cd30c3f3e770dc5b">More...</a><br /></td></tr>
<tr class="separator:gac5c6fe277747f034cd30c3f3e770dc5b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga88ebd56b0defc49ebd308951df1eaf0e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga88ebd56b0defc49ebd308951df1eaf0e">XGPIOPS_BANK1</a>&#160;&#160;&#160;0x01U</td></tr>
<tr class="memdesc:ga88ebd56b0defc49ebd308951df1eaf0e"><td class="mdescLeft">&#160;</td><td class="mdescRight">GPIO Bank 1.  <a href="group__gpiops__v3__1.html#ga88ebd56b0defc49ebd308951df1eaf0e">More...</a><br /></td></tr>
<tr class="separator:ga88ebd56b0defc49ebd308951df1eaf0e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae57e0fee992d409f0ff32d35e68f6fbc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#gae57e0fee992d409f0ff32d35e68f6fbc">XGPIOPS_BANK2</a>&#160;&#160;&#160;0x02U</td></tr>
<tr class="memdesc:gae57e0fee992d409f0ff32d35e68f6fbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">GPIO Bank 2.  <a href="group__gpiops__v3__1.html#gae57e0fee992d409f0ff32d35e68f6fbc">More...</a><br /></td></tr>
<tr class="separator:gae57e0fee992d409f0ff32d35e68f6fbc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac994de03aa64e2b6b3c6b6da9d76e020"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#gac994de03aa64e2b6b3c6b6da9d76e020">XGPIOPS_BANK3</a>&#160;&#160;&#160;0x03U</td></tr>
<tr class="memdesc:gac994de03aa64e2b6b3c6b6da9d76e020"><td class="mdescLeft">&#160;</td><td class="mdescRight">GPIO Bank 3.  <a href="group__gpiops__v3__1.html#gac994de03aa64e2b6b3c6b6da9d76e020">More...</a><br /></td></tr>
<tr class="separator:gac994de03aa64e2b6b3c6b6da9d76e020"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab8661a0444fd67d2b87a14b3c196e571"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#gab8661a0444fd67d2b87a14b3c196e571">XGPIOPS_MAX_BANKS_ZYNQMP</a>&#160;&#160;&#160;0x06U</td></tr>
<tr class="memdesc:gab8661a0444fd67d2b87a14b3c196e571"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max banks in a Zynq Ultrascale+ MP GPIO device.  <a href="group__gpiops__v3__1.html#gab8661a0444fd67d2b87a14b3c196e571">More...</a><br /></td></tr>
<tr class="separator:gab8661a0444fd67d2b87a14b3c196e571"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27b466ba78cf142027ca998d0d67d2e0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga27b466ba78cf142027ca998d0d67d2e0">XGPIOPS_MAX_BANKS</a>&#160;&#160;&#160;0x04U</td></tr>
<tr class="memdesc:ga27b466ba78cf142027ca998d0d67d2e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max banks in a Zynq GPIO device.  <a href="group__gpiops__v3__1.html#ga27b466ba78cf142027ca998d0d67d2e0">More...</a><br /></td></tr>
<tr class="separator:ga27b466ba78cf142027ca998d0d67d2e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8f80173cb28cbac5bab53c4fc7c7dd96"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga8f80173cb28cbac5bab53c4fc7c7dd96">XGPIOPS_DEVICE_MAX_PIN_NUM_ZYNQMP</a>&#160;&#160;&#160;(u32)174</td></tr>
<tr class="memdesc:ga8f80173cb28cbac5bab53c4fc7c7dd96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max pins in the Zynq Ultrascale+ MP GPIO device 0 - 25, Bank 0 26 - 51, Bank 1 52 - 77, Bank 2 78 - 109, Bank 3 110 - 141, Bank 4 142 - 173, Bank 5.  <a href="group__gpiops__v3__1.html#ga8f80173cb28cbac5bab53c4fc7c7dd96">More...</a><br /></td></tr>
<tr class="separator:ga8f80173cb28cbac5bab53c4fc7c7dd96"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6d70822b76e1dd3fda458ed693a082af"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga6d70822b76e1dd3fda458ed693a082af">XGPIOPS_DEVICE_MAX_PIN_NUM</a>&#160;&#160;&#160;(u32)118</td></tr>
<tr class="memdesc:ga6d70822b76e1dd3fda458ed693a082af"><td class="mdescLeft">&#160;</td><td class="mdescRight">Max pins in the Zynq GPIO device 0 - 31, Bank 0 32 - 53, Bank 1 54 - 85, Bank 2 86 - 117, Bank 3.  <a href="group__gpiops__v3__1.html#ga6d70822b76e1dd3fda458ed693a082af">More...</a><br /></td></tr>
<tr class="separator:ga6d70822b76e1dd3fda458ed693a082af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Interrupt types</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>The following constants define the interrupt types that can be set for each GPIO pin. </p>
</div></td></tr>
<tr class="memitem:ga25b306607f3b370ea355229c21e7db02"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga25b306607f3b370ea355229c21e7db02">XGPIOPS_IRQ_TYPE_EDGE_RISING</a>&#160;&#160;&#160;0x00U</td></tr>
<tr class="memdesc:ga25b306607f3b370ea355229c21e7db02"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt on Rising edge.  <a href="group__gpiops__v3__1.html#ga25b306607f3b370ea355229c21e7db02">More...</a><br /></td></tr>
<tr class="separator:ga25b306607f3b370ea355229c21e7db02"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae8082ec62bd44c68e3334b77c87fca96"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#gae8082ec62bd44c68e3334b77c87fca96">XGPIOPS_IRQ_TYPE_EDGE_FALLING</a>&#160;&#160;&#160;0x01U</td></tr>
<tr class="memdesc:gae8082ec62bd44c68e3334b77c87fca96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt Falling edge.  <a href="group__gpiops__v3__1.html#gae8082ec62bd44c68e3334b77c87fca96">More...</a><br /></td></tr>
<tr class="separator:gae8082ec62bd44c68e3334b77c87fca96"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaa0415781a99043db06849daa027d5c5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#gaaa0415781a99043db06849daa027d5c5">XGPIOPS_IRQ_TYPE_EDGE_BOTH</a>&#160;&#160;&#160;0x02U</td></tr>
<tr class="memdesc:gaaa0415781a99043db06849daa027d5c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt on both edges.  <a href="group__gpiops__v3__1.html#gaaa0415781a99043db06849daa027d5c5">More...</a><br /></td></tr>
<tr class="separator:gaaa0415781a99043db06849daa027d5c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga09bf1d6e818f6f442ba61535f8e855ea"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga09bf1d6e818f6f442ba61535f8e855ea">XGPIOPS_IRQ_TYPE_LEVEL_HIGH</a>&#160;&#160;&#160;0x03U</td></tr>
<tr class="memdesc:ga09bf1d6e818f6f442ba61535f8e855ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt on high level.  <a href="group__gpiops__v3__1.html#ga09bf1d6e818f6f442ba61535f8e855ea">More...</a><br /></td></tr>
<tr class="separator:ga09bf1d6e818f6f442ba61535f8e855ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga84b599940b75f6e1d6920c7b33fc2789"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga84b599940b75f6e1d6920c7b33fc2789">XGPIOPS_IRQ_TYPE_LEVEL_LOW</a>&#160;&#160;&#160;0x04U</td></tr>
<tr class="memdesc:ga84b599940b75f6e1d6920c7b33fc2789"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt on low level.  <a href="group__gpiops__v3__1.html#ga84b599940b75f6e1d6920c7b33fc2789">More...</a><br /></td></tr>
<tr class="separator:ga84b599940b75f6e1d6920c7b33fc2789"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
Typedefs</h2></td></tr>
<tr class="memitem:ga85028e3aa9d71291581c0c7036f6c2d9"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga85028e3aa9d71291581c0c7036f6c2d9">XGpioPs_Handler</a>) (void *CallBackRef, u32 Bank, u32 Status)</td></tr>
<tr class="memdesc:ga85028e3aa9d71291581c0c7036f6c2d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">This handler data type allows the user to define a callback function to handle the interrupts for the GPIO device.  <a href="group__gpiops__v3__1.html#ga85028e3aa9d71291581c0c7036f6c2d9">More...</a><br /></td></tr>
<tr class="separator:ga85028e3aa9d71291581c0c7036f6c2d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga8e7bc106ec7c6108c26dfe835713d501"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga8e7bc106ec7c6108c26dfe835713d501">XGpioPs_Read</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank)</td></tr>
<tr class="memdesc:ga8e7bc106ec7c6108c26dfe835713d501"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the Data register of the specified GPIO bank.  <a href="group__gpiops__v3__1.html#ga8e7bc106ec7c6108c26dfe835713d501">More...</a><br /></td></tr>
<tr class="separator:ga8e7bc106ec7c6108c26dfe835713d501"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacda78d38a3b2dbf4398c5df2c88e0424"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#gacda78d38a3b2dbf4398c5df2c88e0424">XGpioPs_Write</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 Data)</td></tr>
<tr class="memdesc:gacda78d38a3b2dbf4398c5df2c88e0424"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write to the Data register of the specified GPIO bank.  <a href="group__gpiops__v3__1.html#gacda78d38a3b2dbf4398c5df2c88e0424">More...</a><br /></td></tr>
<tr class="separator:gacda78d38a3b2dbf4398c5df2c88e0424"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga85638e14681720794efa7e55d69360fc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga85638e14681720794efa7e55d69360fc">XGpioPs_SetDirection</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 Direction)</td></tr>
<tr class="memdesc:ga85638e14681720794efa7e55d69360fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the Direction of the pins of the specified GPIO Bank.  <a href="group__gpiops__v3__1.html#ga85638e14681720794efa7e55d69360fc">More...</a><br /></td></tr>
<tr class="separator:ga85638e14681720794efa7e55d69360fc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga158c9afe847d2b5f6bab24d20926c359"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga158c9afe847d2b5f6bab24d20926c359">XGpioPs_GetDirection</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank)</td></tr>
<tr class="memdesc:ga158c9afe847d2b5f6bab24d20926c359"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the Direction of the pins of the specified GPIO Bank.  <a href="group__gpiops__v3__1.html#ga158c9afe847d2b5f6bab24d20926c359">More...</a><br /></td></tr>
<tr class="separator:ga158c9afe847d2b5f6bab24d20926c359"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga867a6006d591516ed79727bb6392b9ac"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga867a6006d591516ed79727bb6392b9ac">XGpioPs_SetOutputEnable</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 OpEnable)</td></tr>
<tr class="memdesc:ga867a6006d591516ed79727bb6392b9ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the Output Enable of the pins of the specified GPIO Bank.  <a href="group__gpiops__v3__1.html#ga867a6006d591516ed79727bb6392b9ac">More...</a><br /></td></tr>
<tr class="separator:ga867a6006d591516ed79727bb6392b9ac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac182a9828e0ecfdc7a1cbe0c5a1a763f"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#gac182a9828e0ecfdc7a1cbe0c5a1a763f">XGpioPs_GetOutputEnable</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank)</td></tr>
<tr class="memdesc:gac182a9828e0ecfdc7a1cbe0c5a1a763f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the Output Enable status of the pins of the specified GPIO Bank.  <a href="group__gpiops__v3__1.html#gac182a9828e0ecfdc7a1cbe0c5a1a763f">More...</a><br /></td></tr>
<tr class="separator:gac182a9828e0ecfdc7a1cbe0c5a1a763f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga13b3e68acd59636ebaed5c71055e583c"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga13b3e68acd59636ebaed5c71055e583c">XGpioPs_ReadPin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga13b3e68acd59636ebaed5c71055e583c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read Data from the specified pin.  <a href="group__gpiops__v3__1.html#ga13b3e68acd59636ebaed5c71055e583c">More...</a><br /></td></tr>
<tr class="separator:ga13b3e68acd59636ebaed5c71055e583c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4f1789ef303dcbfbdb402663e7b0019d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga4f1789ef303dcbfbdb402663e7b0019d">XGpioPs_WritePin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin, u32 Data)</td></tr>
<tr class="memdesc:ga4f1789ef303dcbfbdb402663e7b0019d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write data to the specified pin.  <a href="group__gpiops__v3__1.html#ga4f1789ef303dcbfbdb402663e7b0019d">More...</a><br /></td></tr>
<tr class="separator:ga4f1789ef303dcbfbdb402663e7b0019d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2dc5d53b864a3beb90481390f06e1099"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga2dc5d53b864a3beb90481390f06e1099">XGpioPs_SetDirectionPin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin, u32 Direction)</td></tr>
<tr class="memdesc:ga2dc5d53b864a3beb90481390f06e1099"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the Direction of the specified pin.  <a href="group__gpiops__v3__1.html#ga2dc5d53b864a3beb90481390f06e1099">More...</a><br /></td></tr>
<tr class="separator:ga2dc5d53b864a3beb90481390f06e1099"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga07a1af7cd9070c4037773cc30d53c364"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga07a1af7cd9070c4037773cc30d53c364">XGpioPs_GetDirectionPin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga07a1af7cd9070c4037773cc30d53c364"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the Direction of the specified pin.  <a href="group__gpiops__v3__1.html#ga07a1af7cd9070c4037773cc30d53c364">More...</a><br /></td></tr>
<tr class="separator:ga07a1af7cd9070c4037773cc30d53c364"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae84916ec202e4d3a8a46a20857753eec"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#gae84916ec202e4d3a8a46a20857753eec">XGpioPs_SetOutputEnablePin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin, u32 OpEnable)</td></tr>
<tr class="memdesc:gae84916ec202e4d3a8a46a20857753eec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the Output Enable of the specified pin.  <a href="group__gpiops__v3__1.html#gae84916ec202e4d3a8a46a20857753eec">More...</a><br /></td></tr>
<tr class="separator:gae84916ec202e4d3a8a46a20857753eec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5d3c0e39d48cd827e3e10be5429f5b30"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga5d3c0e39d48cd827e3e10be5429f5b30">XGpioPs_GetOutputEnablePin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga5d3c0e39d48cd827e3e10be5429f5b30"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the Output Enable status of the specified pin.  <a href="group__gpiops__v3__1.html#ga5d3c0e39d48cd827e3e10be5429f5b30">More...</a><br /></td></tr>
<tr class="separator:ga5d3c0e39d48cd827e3e10be5429f5b30"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga173133193aeba362fa0a5c6e7cdd8dfa"><td class="memItemLeft" align="right" valign="top">s32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga173133193aeba362fa0a5c6e7cdd8dfa">XGpioPs_SelfTest</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga173133193aeba362fa0a5c6e7cdd8dfa"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function runs a self-test on the GPIO driver/device.  <a href="group__gpiops__v3__1.html#ga173133193aeba362fa0a5c6e7cdd8dfa">More...</a><br /></td></tr>
<tr class="separator:ga173133193aeba362fa0a5c6e7cdd8dfa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga812e5a4df20dcae1a95ec4b15d36f039"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga812e5a4df20dcae1a95ec4b15d36f039">XGpioPs_IntrEnable</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 Mask)</td></tr>
<tr class="memdesc:ga812e5a4df20dcae1a95ec4b15d36f039"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables the interrupts for the specified pins in the specified bank.  <a href="group__gpiops__v3__1.html#ga812e5a4df20dcae1a95ec4b15d36f039">More...</a><br /></td></tr>
<tr class="separator:ga812e5a4df20dcae1a95ec4b15d36f039"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5b84f2cbaaa08abf138209b975192326"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga5b84f2cbaaa08abf138209b975192326">XGpioPs_IntrDisable</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 Mask)</td></tr>
<tr class="memdesc:ga5b84f2cbaaa08abf138209b975192326"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function disables the interrupts for the specified pins in the specified bank.  <a href="group__gpiops__v3__1.html#ga5b84f2cbaaa08abf138209b975192326">More...</a><br /></td></tr>
<tr class="separator:ga5b84f2cbaaa08abf138209b975192326"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaff7a79032f9e298f73c48763e7723bfd"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#gaff7a79032f9e298f73c48763e7723bfd">XGpioPs_IntrGetEnabled</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank)</td></tr>
<tr class="memdesc:gaff7a79032f9e298f73c48763e7723bfd"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the interrupt enable status for a bank.  <a href="group__gpiops__v3__1.html#gaff7a79032f9e298f73c48763e7723bfd">More...</a><br /></td></tr>
<tr class="separator:gaff7a79032f9e298f73c48763e7723bfd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga029493370cece06799abb021207cf53f"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga029493370cece06799abb021207cf53f">XGpioPs_IntrGetStatus</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank)</td></tr>
<tr class="memdesc:ga029493370cece06799abb021207cf53f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns interrupt status read from Interrupt Status Register.  <a href="group__gpiops__v3__1.html#ga029493370cece06799abb021207cf53f">More...</a><br /></td></tr>
<tr class="separator:ga029493370cece06799abb021207cf53f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1168915d3d7b4803bcf30799e0bfdc32"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga1168915d3d7b4803bcf30799e0bfdc32">XGpioPs_IntrClear</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 Mask)</td></tr>
<tr class="memdesc:ga1168915d3d7b4803bcf30799e0bfdc32"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function clears pending interrupt(s) with the provided mask.  <a href="group__gpiops__v3__1.html#ga1168915d3d7b4803bcf30799e0bfdc32">More...</a><br /></td></tr>
<tr class="separator:ga1168915d3d7b4803bcf30799e0bfdc32"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga47789beb1dcd80b9ef68adaa9eb6b6bf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga47789beb1dcd80b9ef68adaa9eb6b6bf">XGpioPs_SetIntrType</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 IntrType, u32 IntrPolarity, u32 IntrOnAny)</td></tr>
<tr class="memdesc:ga47789beb1dcd80b9ef68adaa9eb6b6bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is used for setting the Interrupt Type, Interrupt Polarity and Interrupt On Any for the specified GPIO Bank pins.  <a href="group__gpiops__v3__1.html#ga47789beb1dcd80b9ef68adaa9eb6b6bf">More...</a><br /></td></tr>
<tr class="separator:ga47789beb1dcd80b9ef68adaa9eb6b6bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad1e07837d6bfe1cf16d0b8a454a7de29"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#gad1e07837d6bfe1cf16d0b8a454a7de29">XGpioPs_GetIntrType</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u8 Bank, u32 *IntrType, u32 *IntrPolarity, u32 *IntrOnAny)</td></tr>
<tr class="memdesc:gad1e07837d6bfe1cf16d0b8a454a7de29"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is used for getting the Interrupt Type, Interrupt Polarity and Interrupt On Any for the specified GPIO Bank pins.  <a href="group__gpiops__v3__1.html#gad1e07837d6bfe1cf16d0b8a454a7de29">More...</a><br /></td></tr>
<tr class="separator:gad1e07837d6bfe1cf16d0b8a454a7de29"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacd63e0e5c7ed18517d54104e4ad6dcd4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#gacd63e0e5c7ed18517d54104e4ad6dcd4">XGpioPs_SetCallbackHandler</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, void *CallBackRef, <a class="el" href="group__gpiops__v3__1.html#ga85028e3aa9d71291581c0c7036f6c2d9">XGpioPs_Handler</a> FuncPointer)</td></tr>
<tr class="memdesc:gacd63e0e5c7ed18517d54104e4ad6dcd4"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the status callback function.  <a href="group__gpiops__v3__1.html#gacd63e0e5c7ed18517d54104e4ad6dcd4">More...</a><br /></td></tr>
<tr class="separator:gacd63e0e5c7ed18517d54104e4ad6dcd4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaca8012790789d80573f4b2fa9e601e7c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#gaca8012790789d80573f4b2fa9e601e7c">XGpioPs_IntrHandler</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaca8012790789d80573f4b2fa9e601e7c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is the interrupt handler for GPIO interrupts.It checks the interrupt status registers of all the banks to determine the actual bank in which an interrupt has been triggered.  <a href="group__gpiops__v3__1.html#gaca8012790789d80573f4b2fa9e601e7c">More...</a><br /></td></tr>
<tr class="separator:gaca8012790789d80573f4b2fa9e601e7c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga963415d9096b5887c5388cea74cd1116"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga963415d9096b5887c5388cea74cd1116">XGpioPs_SetIntrTypePin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin, u8 IrqType)</td></tr>
<tr class="memdesc:ga963415d9096b5887c5388cea74cd1116"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function is used for setting the IRQ Type of a single GPIO pin.  <a href="group__gpiops__v3__1.html#ga963415d9096b5887c5388cea74cd1116">More...</a><br /></td></tr>
<tr class="separator:ga963415d9096b5887c5388cea74cd1116"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1d91233cc0556e3eb8d39cc856b6436c"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga1d91233cc0556e3eb8d39cc856b6436c">XGpioPs_GetIntrTypePin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga1d91233cc0556e3eb8d39cc856b6436c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the IRQ Type of a given GPIO pin.  <a href="group__gpiops__v3__1.html#ga1d91233cc0556e3eb8d39cc856b6436c">More...</a><br /></td></tr>
<tr class="separator:ga1d91233cc0556e3eb8d39cc856b6436c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadc4ea201a1c488a1b667a77f3c6fd23b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#gadc4ea201a1c488a1b667a77f3c6fd23b">XGpioPs_IntrEnablePin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:gadc4ea201a1c488a1b667a77f3c6fd23b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables the interrupt for the specified pin.  <a href="group__gpiops__v3__1.html#gadc4ea201a1c488a1b667a77f3c6fd23b">More...</a><br /></td></tr>
<tr class="separator:gadc4ea201a1c488a1b667a77f3c6fd23b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8a00fd131bf76eab2dcdd48079845b37"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga8a00fd131bf76eab2dcdd48079845b37">XGpioPs_IntrDisablePin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga8a00fd131bf76eab2dcdd48079845b37"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function disables the interrupts for the specified pin.  <a href="group__gpiops__v3__1.html#ga8a00fd131bf76eab2dcdd48079845b37">More...</a><br /></td></tr>
<tr class="separator:ga8a00fd131bf76eab2dcdd48079845b37"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga612ecefd5e1f81cccf6b878505b7e242"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga612ecefd5e1f81cccf6b878505b7e242">XGpioPs_IntrGetEnabledPin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga612ecefd5e1f81cccf6b878505b7e242"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns whether interrupts are enabled for the specified pin.  <a href="group__gpiops__v3__1.html#ga612ecefd5e1f81cccf6b878505b7e242">More...</a><br /></td></tr>
<tr class="separator:ga612ecefd5e1f81cccf6b878505b7e242"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7ed8ee94fdf3f26e765a997aeab64595"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga7ed8ee94fdf3f26e765a997aeab64595">XGpioPs_IntrGetStatusPin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga7ed8ee94fdf3f26e765a997aeab64595"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns interrupt enable status of the specified pin.  <a href="group__gpiops__v3__1.html#ga7ed8ee94fdf3f26e765a997aeab64595">More...</a><br /></td></tr>
<tr class="separator:ga7ed8ee94fdf3f26e765a997aeab64595"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27216bebe86f0d32540920a40674340f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga27216bebe86f0d32540920a40674340f">XGpioPs_IntrClearPin</a> (<a class="el" href="struct_x_gpio_ps.html">XGpioPs</a> *InstancePtr, u32 Pin)</td></tr>
<tr class="memdesc:ga27216bebe86f0d32540920a40674340f"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function clears the specified pending interrupt.  <a href="group__gpiops__v3__1.html#ga27216bebe86f0d32540920a40674340f">More...</a><br /></td></tr>
<tr class="separator:ga27216bebe86f0d32540920a40674340f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9c49687af4625a0ed49f376d3ff1b045"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_gpio_ps___config.html">XGpioPs_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__gpiops__v3__1.html#ga9c49687af4625a0ed49f376d3ff1b045">XGpioPs_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:ga9c49687af4625a0ed49f376d3ff1b045"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function looks for the device configuration based on the unique device ID.  <a href="group__gpiops__v3__1.html#ga9c49687af4625a0ed49f376d3ff1b045">More...</a><br /></td></tr>
<tr class="separator:ga9c49687af4625a0ed49f376d3ff1b045"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
</div><!-- contents -->
</div><!-- doc-content -->
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
  <ul>
    <li class="footer">Copyright &copy; 2015 Xilinx Inc. All rights reserved.</li>
  </ul>
</div>
</body>
</html>
